Brice Goglin
Research director at Inria.

Head of the TADaaM Inria team
Inria Bordeaux - Sud-Ouest Research Centre
LaBRI (Laboratoire Bordelais de Recherche en Informatique, CNRS research unit UMR 5800, Satanas Team)
University of Bordeaux

Phone: +33 (0)5 24 57 40 91
Fax: +33 (0)5 24 57 40 56

• 2026/09/23 - Major release 2.15.0 of Hardware Locality (hwloc), the portable library that abstracts and lets you traverse hardware topologies, download it here!
• 2024/11/26 - Together with Samuel Thibault, we received the 2024 Inria – Académie des sciences – Dassault Systèmes Innovation Award for our work on the hwloc software. More details in this article.
• 2024/01/15 - My PhD student Clément Gavoille defended his PhD on performance prediction on ARM architectures.
• 2022/07/05 - Collaboration with AMD and HPE Cray explained in hwloc helps Frontier break the exaflop barrier
• 2020/11/17 - Hardware Locality is nominated for a French reward for academic open-source projects.
• 2020/06/24 - Stable release 1.1.4 of KNEM.
• 2014/04/15 - I defended my HDR Habilitation at University of Bordeaux.

I am working in the TADaaM Inria team (previously Runtime Inria Team-Project). My primary research interests are:

• Modeling modern hierarchical and multicore platforms;
• I/O in multicore and NUMA hierarchical machines;
• High performance communication;
• Memory management and migration for OpenMP threads scheduling over hierarchical architectures.

More details here.

My Habilitation dissertation (in French) and my Ph.D dissertation (in French).

• Ana Gainaru, Brice Goglin, Valentin Honoré, and Guillaume Pallez. Profiles of upcoming HPC Applications and their Impact on Reservation Strategies. IEEE Transactions on Parallel and Distributed Systems, 32:1178-1190, May 2021.  Bibtex  Open archive  DOI
• Nicolas Denoyelle, Brice Goglin, Aleksandar Ilic, Emmanuel Jeannot, and Leonel Sousa. Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model. IEEE Transactions on Parallel and Distributed Systems, 30(6):1374-1389, June 2019.  Bibtex  Open archive  DOI
• Brice Goglin, Emmanuel Jeannot, Farouk Mansouri, and Guillaume Mercier. Hardware topology management in MPI applications through hierarchical communicators. Parallel Computing (PARCO), 76:70-90, August 2018.  Bibtex  Open archive  DOI
• Brice Goglin. Exposing the Locality of Heterogeneous Memory Architectures to HPC Applications. In The Second International Symposium on Memory Systems Proceedings (MEMSYS16), pages 30-39, Washington, DC, October 2016. ACM.  Bibtex  Open archive  DOI
• Brice Goglin. High-Performance Message Passing over generic Ethernet Hardware with Open-MX. Elsevier Journal of Parallel Computing (PARCO), 37(2):85-100, February 2011.  Bibtex  Open archive  DOI
• Stéphanie Moreaud, Brice Goglin, and Raymond Namyst. Adaptive MPI Multirail Tuning for Non-Uniform Input/Output Access. In Edgar Gabriel Rainer Keller and Jack Dongarra, editors, Recent Advances in the Message Passing Interface. The 17th European MPI User's Group Meeting (EuroMPI 2010), volume 6305 of Lecture Notes in Computer Science, pages 239-248, Stuttgart, Germany, September 2010. Springer-Verlag. Best paper award.  Bibtex  Open archive  DOI
• François Broquedis, Nathalie Furmento, Brice Goglin, Pierre-André Wacrenier, and Raymond Namyst. ForestGOMP: an efficient OpenMP environment for NUMA architectures. International Journal on Parallel Programming, Special Issue on OpenMP; Guest Editors: Matthias S. Müller and Eduard Ayguadé, 38(5):418-439, 2010.  Bibtex  Open archive  DOI

List of Publications (with BibTex entries) — HAL export (with PDFs) — Google Scholar — DBLP — ORCID — Scopus

• Portable Hardware Locality (hwloc)
• KNEM: High-Performance Intra-Node MPI Communication
• Open-MX: Myrinet Express over Generic Ethernet Hardware

• Unified Acceleration Foundation Hardware SIG (former Level Zero Technical Advisory Board, since 2022).
• Khronos OpenCL Advisory Panel (since 2021)
• Collaboration with Intel about modeling manycore platforms and new memory architectures, since 2015.
• hwloc and netloc software development within the Open MPI consortium (Cisco, Intel, AMD, UTK, etc.).
• H2M ANR-DFG project with RWTH Aachen University on Heuristics for Heterogeneous Memory (2021-2024).
• EUPEX European Project
• Textarossa European Project
• INESC-ID laboratory from Lisbon University about the Locality-aware Roofline Model (2015-2018).
• PIA ELCI with CEA and Atos/Bull, 2014-2017.
• ITEA2 COLOC project with many European partners, 2014-2017.
• SEHLOC STIC-AmSud project with UNSL (Argentina) and UdelaR (Uruguay), 2013-2014.
• Common Communication Interface with Oak Ridge National Lab (USA), 2012-2014.
• ANR Infra SONGS with many French partners, 2012-2015.
• Inria associated team MPI-Runtime with Argonne National Lab, 2008-2010.
• Myricom for Open-MX software development, 2007-2008.

• Méline Trochon (PhD with DataDirect Networks, 2024-2027)
• Charles Goedefroit (PhD with Eviden, 2024-2026)
• Pierre Clouzet (Engineer, 2023-2025)
• Thibaut Pepin (PhD with CEA/DAM, 2023-2026)
• Corentin Mercier (Master, 2022)
• Clément Foyer (Post-Doc, 2021-2022)
• Clément Gavoille (PhD with CEA/DAM, 2021-2023)
• Andrés Rubio (PhD, 2018-2021)
• Valentin Hoyet (Apprenticeship Engineer, 2018-2021)
• Valentin Honoré (PhD, 2017-2020)
• Nicolas Denoyelle (Master, Engineer and PhD, 2014-2018)
• Cyril Bordage (Post-Doc, 2015-2018)
• Clément Foyer (Engineer, 2017)
• Ahmad Boissetri Binzagr (Undergraduate, 2016)
• Guillaume Beauchamp (Undergraduate, 2015)
• Bertrand Putigny (PhD, 2010-2014)
• Clément Dussieux (ENSEIRB engineering school, 2014)
• Benoit Ruelle (ENSEIRB engineering school, 2013)
• Antoine Rougier (Master, 2012)
• Stéphanie Moreaud (Master and PhD, 2007-2011)
• Romain Perier (Master, 2010)
• Ludovic Stordeur (Engineer, 2009-2011)
• François Broquedis (Master, 2007)

Among others:

• Head of the TADaaM Inria team (since 2025).
• In charge of parallel computing platforms for the Inria Bordeaux - Sud-Ouest Research Centre (since 2021).
• In charge of the scientific mediation for the Inria Bordeaux - Sud-Ouest Research Centre (2010-2021).
• Coordinator of the 2013 CEA-EDF-Inria HPC summer school on Programming Heterogeneous Parallel Architectures.
• In charge of the Inria booth at the Supercomputing Conference and Exhibition (2010-2014).
• Program Committees:
  • Conferences: Cluster (2014, 2016, 2024, 2025, 2026), SuperComputing (Area co-Chair 2020, PC member 2012 and 2024, Poster PC 2018), Hot Interconnects (2012-2019, 2021-2023, 2025), ISC (2021), EuroMPI (Program co-Chair 2015, PC member 2011-2014, 2017-2019), ICPP (2019), CCGrid (Poster 2016), CARLA (2014, 2017), ICCCN (2014), HiPC (2013-2014, 2024), Euro-Par (2023, Track Co-chair 2011), ISPAN (2011), Smoky Mountains 2021.
  • Workshops: RADR (2019-2021), COLOC (2017-2021), PADAL (co-Chair 2019), ROME (2018-2019, 2022), ExaComm (2016-2019), HeteroPar 2022.
• Administrator of the team experimental machines (Dalton).
• Treasurer of the works council (AGOS) of the Inria Research Centre (2012-2018).

Current and past Teaching activities (in French).

Personal webpage.

Curriculum Vitæ.

Public PGP key: 0x235ABD3B.

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