Brice Goglin
Contact
Brice Goglin
Research director at Inria.
TADaaM Inria team
(previously Runtime)
Inria Bordeaux - Sud-Ouest Research Centre
LaBRI (Laboratoire Bordelais de Recherche en Informatique,
CNRS research unit UMR 5800, Satanas Team)
University of Bordeaux
Post address:
Inria Bordeaux
200 avenue de la vieille tour
33405 Talence cedex
France
Phone: +33 (0)5 24 57 40 91
Fax: +33 (0)5 24 57 40 56
News
- 2019/10/03 -
Major release 2.1.0 of Hardware Locality (hwloc),
the portable library that abstracts and lets you traverse hardware topologies,
download it here!
- 2019/09/09-11 -
We organize the PADAL'19 workshop à Inria Bordeaux - Sud-Ouest.
- 2018/11/05 -
My PhD student Nicolas Denoyelle his PhD at Inria Bordeaux Sud-Ouest.
- 2014/04/15 -
I defended my HDR Habilitation at University of Bordeaux.
Research
I am working in the TADaaM Inria team
(previously Runtime Inria Team-Project).
My primary research interests are:
- Modeling modern hierarchical and multicore platforms;
- I/O in multicore and NUMA hierarchical machines;
- High performance communication;
- Memory management and migration for OpenMP threads scheduling over hierarchical architectures.
More details here.
My Habilitation dissertation (in French)
and my Ph.D dissertation (in French).
Selected Publications
-
Nicolas Denoyelle, Brice Goglin, Aleksandar Ilic, Emmanuel Jeannot, and Leonel
Sousa.
Modeling Non-Uniform Memory Access on Large Compute
Nodes with the Cache-Aware Roofline Model.
IEEE Transactions on Parallel and Distributed
Systems, 30(6):1374-1389, June 2019.
Bibtex
Open archive
DOI
-
Guillaume Aupy, Anne Benoit, Brice Goglin, Loïc Pottier, and Yves Robert.
Co-scheduling HPC workloads on cache-partitioned CMP
platforms.
In Proceedings of the IEEE Cluster Conference
2018, pages 335-345, Belfast, Northern Ireland, September 2018.
Bibtex
Open archive
DOI
-
Brice Goglin, Emmanuel Jeannot, Farouk Mansouri, and Guillaume Mercier.
Hardware topology management in MPI applications through
hierarchical communicators.
Parallel Computing (PARCO), 76:70-90, August
2018.
Bibtex
Open archive
DOI
-
Brice Goglin.
Exposing the Locality of Heterogeneous Memory
Architectures to HPC Applications.
In The Second International Symposium on Memory Systems
Proceedings (MEMSYS16), pages 30-39, Washington, DC, October
2016. ACM.
Bibtex
Open archive
DOI
-
Brice Goglin.
High-Performance Message Passing over generic Ethernet
Hardware with Open-MX.
Elsevier Journal of Parallel Computing
(PARCO), 37(2):85-100, February 2011.
Bibtex
Open archive
DOI
-
Stéphanie Moreaud, Brice Goglin, and Raymond Namyst.
Adaptive MPI Multirail Tuning for Non-Uniform
Input/Output Access.
In Edgar Gabriel Rainer Keller and Jack Dongarra, editors,
Recent Advances in the Message Passing Interface. The 17th
European MPI User's Group Meeting (EuroMPI 2010), volume 6305 of
Lecture Notes in Computer Science, pages 239-248,
Stuttgart, Germany, September 2010. Springer-Verlag.
Best paper award.
Bibtex
Open archive
DOI
-
François Broquedis, Nathalie Furmento, Brice Goglin, Pierre-André
Wacrenier, and Raymond Namyst.
ForestGOMP: an efficient OpenMP environment for NUMA
architectures.
International Journal on Parallel Programming, Special
Issue on OpenMP; Guest Editors: Matthias S. Müller and Eduard
Ayguadé, 38(5):418-439, 2010.
Bibtex
Open archive
DOI
List of Publications (with BibTex entries)
— HAL export (with PDFs)
— Google Scholar
— DBLP
— ORCID
— Scopus
Software
Collaborations
-
Collaboration with Intel about modeling manycore platforms and new memory architectures, 2015-...
-
hwloc and netloc software development within the Open MPI consortium (Cisco, Intel, AMD, UTK, etc.).
-
INESC-ID laboratory from Lisbon University about the Locality-aware Roofline Model (2015-2018).
-
PIA ELCI with CEA and Atos/Bull, 2014-2017.
-
ITEA2 COLOC project with many European partners,
2014-2017.
-
SEHLOC STIC-AmSud project with UNSL (Argentina) and UdelaR (Uruguay), 2013-2014.
-
Common Communication Interface
with Oak Ridge National Lab (USA), 2012-2014.
-
ANR Infra SONGS
with many French partners, 2012-2015.
-
Inria associated team MPI-Runtime with
Argonne National Lab, 2008-2010.
-
Myricom for Open-MX software development, 2007-2008.
Supervising
- Andrés Rubio (PhD, 2018-2021)
- Valentin Hoyet (Apprenticeship Engineer, 2018-2021)
- Valentin Honoré (PhD, 2017-2020)
- Nicolas Denoyelle (Master, Engineer and PhD, 2014-2018)
- Cyril Bordage (Post-Doc, 2015-2018)
- Clément Foyer (Engineer, 2017)
- Ahmad Boissetri Binzagr (Undergraduate, 2016)
- Guillaume Beauchamp (Undergraduate, 2015)
- Bertrand Putigny (PhD, 2010-2014)
- Clément Dussieux (ENSEIRB engineering school, 2014)
- Benoit Ruelle (ENSEIRB engineering school, 2013)
- Antoine Rougier (Master, 2012)
- Stéphanie Moreaud (Master and PhD, 2007-2011)
- Romain Perier (Master, 2010)
- Ludovic Stordeur (Engineer, 2009-2011)
- François Broquedis (Master, 2007)
Responsibilities
Among others:
-
In charge of the scientific mediation for the
Inria Bordeaux - Sud-Ouest Research Centre
(since 2010).
-
Coordinator of the 2013 CEA-EDF-Inria HPC summer school on Programming Heterogeneous Parallel Architectures.
-
In charge of the Inria booth at the
Supercomputing Conference and Exhibition (2010-2014).
-
Program Committees:
- Conferences:
EuroMPI 2011-2014, 2015 (program co-chair), 2017-2019,
ICPP 2019,
SuperComputing poster 2018, and member 2012,
Hot Interconnects 2012-2019,
Cluster 2014, 2016,
CCGrid poster 2016,
ICCCN 2014,
CARLA 2014, 2017,
HiPC 2013-2014,
Euro-Par 2011 (track co-chair).
ISPAN 2011,
- Workshops:
ROME 2018-2019,
RADR 2019,
COLOC 2017-2019,
ExaComm 2016-2019,
-
Administrator of the team experimental machines (Dalton).
-
Treasurer of the works council (AGOS)
of the Inria Research Centre (2012-2018).
Teaching
Current and past Teaching activities (in French).
Personal
Personal webpage.
Curriculum Vitæ.
Public PGP key:
0x235ABD3B.
Updated on 2019/12/02.